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Timing Analysis and Optimization of Sequential Circuits, Hardcover by Maheshwari, Naresh; Sapatnekar, Sachin S., ISBN 0792383214, ISBN-13 9780792383215, Brand New, Free shipping in the US
One has to applaud a text for engineers in the area of CAD for VLSI circuit design that begins by stating that the authors "feel obligated to switch from the language of Dilbert cliches to plain English." In presenting a unified approach to designing fast, low power chips for increasingly complex systems, Maheshwari (Iowa State U.) and Sapatnekar (U. of Minnesota) overview techniques for analysis and performance optimization of combinational and sequential circuits; compare the assets and disadvantages of edge- triggered and level-triggered clocking disciplines; and discuss deliberate skews and retiming techniques to improve circuit behavior, offering some new algorithms. Annotation c. Book News, Inc., Portland, OR ()
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