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    Logic Synthesis and Verification Algorithms by Gary D. Hachtel (English) Paperba

    • Item No : 146592744825
    • Condition : Brand New
    • Brand : No brand Info
    • Seller : the_nile
    • Current Bid : US $102.85

    • * Item Description

    • Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students.
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