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FPGA Implementation of MPEG-2 Video decoder: FPGA Implementation of base layer M
- Item No : 157153711209
- Condition : Brand New
- Brand : No brand Info
- Seller : the_nile
- Current Bid : US $45.35
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* Item Description
- The bit-by-bit algorithm, for decoding the base layer Mpeg-2 video stream, was abstracted from the C code and the corresponding hardware module for decoding the sequence was designed in VHDL using Quartus 6.2 tool supplied by Altera.
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